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STM32G474xx HAL用户手册
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32g4xx_ll_spi.c 00004 * @author MCD Application Team 00005 * @brief SPI LL module driver. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2019 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 #if defined(USE_FULL_LL_DRIVER) 00019 00020 /* Includes ------------------------------------------------------------------*/ 00021 #include "stm32g4xx_ll_spi.h" 00022 #include "stm32g4xx_ll_bus.h" 00023 #include "stm32g4xx_ll_rcc.h" 00024 00025 #ifdef USE_FULL_ASSERT 00026 #include "stm32_assert.h" 00027 #else 00028 #define assert_param(expr) ((void)0U) 00029 #endif /* USE_FULL_ASSERT */ 00030 00031 /** @addtogroup STM32G4xx_LL_Driver 00032 * @{ 00033 */ 00034 00035 #if defined (SPI1) || defined (SPI2) || defined (SPI3) || defined (SPI4) 00036 00037 /** @addtogroup SPI_LL 00038 * @{ 00039 */ 00040 00041 /* Private types -------------------------------------------------------------*/ 00042 /* Private variables ---------------------------------------------------------*/ 00043 00044 /* Private constants ---------------------------------------------------------*/ 00045 /** @defgroup SPI_LL_Private_Constants SPI Private Constants 00046 * @{ 00047 */ 00048 /* SPI registers Masks */ 00049 #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \ 00050 SPI_CR1_BR | SPI_CR1_LSBFIRST | SPI_CR1_SSI | \ 00051 SPI_CR1_SSM | SPI_CR1_RXONLY | SPI_CR1_CRCL | \ 00052 SPI_CR1_CRCNEXT | SPI_CR1_CRCEN | SPI_CR1_BIDIOE | \ 00053 SPI_CR1_BIDIMODE) 00054 /** 00055 * @} 00056 */ 00057 00058 /* Private macros ------------------------------------------------------------*/ 00059 /** @defgroup SPI_LL_Private_Macros SPI Private Macros 00060 * @{ 00061 */ 00062 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \ 00063 || ((__VALUE__) == LL_SPI_SIMPLEX_RX) \ 00064 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \ 00065 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX)) 00066 00067 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \ 00068 || ((__VALUE__) == LL_SPI_MODE_SLAVE)) 00069 00070 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT) \ 00071 || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT) \ 00072 || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT) \ 00073 || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT) \ 00074 || ((__VALUE__) == LL_SPI_DATAWIDTH_8BIT) \ 00075 || ((__VALUE__) == LL_SPI_DATAWIDTH_9BIT) \ 00076 || ((__VALUE__) == LL_SPI_DATAWIDTH_10BIT) \ 00077 || ((__VALUE__) == LL_SPI_DATAWIDTH_11BIT) \ 00078 || ((__VALUE__) == LL_SPI_DATAWIDTH_12BIT) \ 00079 || ((__VALUE__) == LL_SPI_DATAWIDTH_13BIT) \ 00080 || ((__VALUE__) == LL_SPI_DATAWIDTH_14BIT) \ 00081 || ((__VALUE__) == LL_SPI_DATAWIDTH_15BIT) \ 00082 || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT)) 00083 00084 #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \ 00085 || ((__VALUE__) == LL_SPI_POLARITY_HIGH)) 00086 00087 #define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \ 00088 || ((__VALUE__) == LL_SPI_PHASE_2EDGE)) 00089 00090 #define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \ 00091 || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \ 00092 || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT)) 00093 00094 #define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2) \ 00095 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4) \ 00096 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8) \ 00097 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16) \ 00098 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32) \ 00099 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64) \ 00100 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \ 00101 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256)) 00102 00103 #define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \ 00104 || ((__VALUE__) == LL_SPI_MSB_FIRST)) 00105 00106 #define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \ 00107 || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE)) 00108 00109 #define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U) 00110 00111 /** 00112 * @} 00113 */ 00114 00115 /* Private function prototypes -----------------------------------------------*/ 00116 00117 /* Exported functions --------------------------------------------------------*/ 00118 /** @addtogroup SPI_LL_Exported_Functions 00119 * @{ 00120 */ 00121 00122 /** @addtogroup SPI_LL_EF_Init 00123 * @{ 00124 */ 00125 00126 /** 00127 * @brief De-initialize the SPI registers to their default reset values. 00128 * @param SPIx SPI Instance 00129 * @retval An ErrorStatus enumeration value: 00130 * - SUCCESS: SPI registers are de-initialized 00131 * - ERROR: SPI registers are not de-initialized 00132 */ 00133 ErrorStatus LL_SPI_DeInit(const SPI_TypeDef *SPIx) 00134 { 00135 ErrorStatus status = ERROR; 00136 00137 /* Check the parameters */ 00138 assert_param(IS_SPI_ALL_INSTANCE(SPIx)); 00139 00140 #if defined(SPI1) 00141 if (SPIx == SPI1) 00142 { 00143 /* Force reset of SPI clock */ 00144 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1); 00145 00146 /* Release reset of SPI clock */ 00147 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1); 00148 00149 status = SUCCESS; 00150 } 00151 #endif /* SPI1 */ 00152 #if defined(SPI2) 00153 if (SPIx == SPI2) 00154 { 00155 /* Force reset of SPI clock */ 00156 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2); 00157 00158 /* Release reset of SPI clock */ 00159 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2); 00160 00161 status = SUCCESS; 00162 } 00163 #endif /* SPI2 */ 00164 #if defined(SPI3) 00165 if (SPIx == SPI3) 00166 { 00167 /* Force reset of SPI clock */ 00168 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3); 00169 00170 /* Release reset of SPI clock */ 00171 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3); 00172 00173 status = SUCCESS; 00174 } 00175 #endif /* SPI3 */ 00176 #if defined(SPI4) 00177 if (SPIx == SPI4) 00178 { 00179 /* Force reset of SPI clock */ 00180 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI4); 00181 00182 /* Release reset of SPI clock */ 00183 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI4); 00184 00185 status = SUCCESS; 00186 } 00187 #endif