|
STM32G474xx HAL用户手册
|
SPI LL模块的头文件。 更多...
#include "stm32g4xx.h"数据结构 | |
| struct | LL_SPI_InitTypeDef |
| SPI初始化结构体定义。 更多... | |
| struct | LL_I2S_InitTypeDef |
| I2S初始化结构体定义。 更多... | |
宏定义 | |
| #define | LL_SPI_SR_RXNE SPI_SR_RXNE |
| #define | LL_SPI_SR_TXE SPI_SR_TXE |
| #define | LL_SPI_SR_BSY SPI_SR_BSY |
| #define | LL_SPI_SR_CRCERR SPI_SR_CRCERR |
| #define | LL_SPI_SR_MODF SPI_SR_MODF |
| #define | LL_SPI_SR_OVR SPI_SR_OVR |
| #define | LL_SPI_SR_FRE SPI_SR_FRE |
| #define | LL_SPI_CR2_RXNEIE SPI_CR2_RXNEIE |
| #define | LL_SPI_CR2_TXEIE SPI_CR2_TXEIE |
| #define | LL_SPI_CR2_ERRIE SPI_CR2_ERRIE |
| #define | LL_SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) |
| #define | LL_SPI_MODE_SLAVE 0x00000000U |
| #define | LL_SPI_PROTOCOL_MOTOROLA 0x00000000U |
| #define | LL_SPI_PROTOCOL_TI (SPI_CR2_FRF) |
| #define | LL_SPI_PHASE_1EDGE 0x00000000U |
| #define | LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) |
| #define | LL_SPI_POLARITY_LOW 0x00000000U |
| #define | LL_SPI_POLARITY_HIGH (SPI_CR1_CPOL) |
| #define | LL_SPI_BAUDRATEPRESCALER_DIV2 0x00000000U |
| #define | LL_SPI_BAUDRATEPRESCALER_DIV4 (SPI_CR1_BR_0) |
| #define | LL_SPI_BAUDRATEPRESCALER_DIV8 (SPI_CR1_BR_1) |
| #define | LL_SPI_BAUDRATEPRESCALER_DIV16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) |
| #define | LL_SPI_BAUDRATEPRESCALER_DIV32 (SPI_CR1_BR_2) |
| #define | LL_SPI_BAUDRATEPRESCALER_DIV64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) |
| #define | LL_SPI_BAUDRATEPRESCALER_DIV128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) |
| #define | LL_SPI_BAUDRATEPRESCALER_DIV256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) |
| #define | LL_SPI_LSB_FIRST (SPI_CR1_LSBFIRST) |
| #define | LL_SPI_MSB_FIRST 0x00000000U |
| #define | LL_SPI_FULL_DUPLEX 0x00000000U |
| #define | LL_SPI_SIMPLEX_RX (SPI_CR1_RXONLY) |
| #define | LL_SPI_HALF_DUPLEX_RX (SPI_CR1_BIDIMODE) |
| #define | LL_SPI_HALF_DUPLEX_TX (SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE) |
| #define | LL_SPI_NSS_SOFT (SPI_CR1_SSM) |
| #define | LL_SPI_NSS_HARD_INPUT 0x00000000U |
| #define | LL_SPI_NSS_HARD_OUTPUT (((uint32_t)SPI_CR2_SSOE << 16U)) |
| #define | LL_SPI_DATAWIDTH_4BIT (SPI_CR2_DS_0 | SPI_CR2_DS_1) |
| #define | LL_SPI_DATAWIDTH_5BIT (SPI_CR2_DS_2) |
| #define | LL_SPI_DATAWIDTH_6BIT (SPI_CR2_DS_2 | SPI_CR2_DS_0) |
| #define | LL_SPI_DATAWIDTH_7BIT (SPI_CR2_DS_2 | SPI_CR2_DS_1) |
| #define | LL_SPI_DATAWIDTH_8BIT (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0) |
| #define | LL_SPI_DATAWIDTH_9BIT (SPI_CR2_DS_3) |
| #define | LL_SPI_DATAWIDTH_10BIT (SPI_CR2_DS_3 | SPI_CR2_DS_0) |
| #define | LL_SPI_DATAWIDTH_11BIT (SPI_CR2_DS_3 | SPI_CR2_DS_1) |
| #define | LL_SPI_DATAWIDTH_12BIT (SPI_CR2_DS_3 | SPI_CR2_DS_1 | SPI_CR2_DS_0) |
| #define | LL_SPI_DATAWIDTH_13BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2) |
| #define | LL_SPI_DATAWIDTH_14BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_0) |
| #define | LL_SPI_DATAWIDTH_15BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1) |
| #define | LL_SPI_DATAWIDTH_16BIT (SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0) |
| #define | LL_SPI_CRCCALCULATION_DISABLE 0x00000000U |
| #define | LL_SPI_CRCCALCULATION_ENABLE (SPI_CR1_CRCEN) |
| #define | LL_SPI_CRC_8BIT 0x00000000U |
| #define | LL_SPI_CRC_16BIT (SPI_CR1_CRCL) |
| #define | LL_SPI_RX_FIFO_TH_HALF 0x00000000U |
| #define | LL_SPI_RX_FIFO_TH_QUARTER (SPI_CR2_FRXTH) |
| #define | LL_SPI_RX_FIFO_EMPTY 0x00000000U |
| #define | LL_SPI_RX_FIFO_QUARTER_FULL (SPI_SR_FRLVL_0) |
| #define | LL_SPI_RX_FIFO_HALF_FULL (SPI_SR_FRLVL_1) |
| #define | LL_SPI_RX_FIFO_FULL (SPI_SR_FRLVL_1 | SPI_SR_FRLVL_0) |
| #define | LL_SPI_TX_FIFO_EMPTY 0x00000000U |
| #define | LL_SPI_TX_FIFO_QUARTER_FULL (SPI_SR_FTLVL_0) |
| #define | LL_SPI_TX_FIFO_HALF_FULL (SPI_SR_FTLVL_1) |
| #define | LL_SPI_TX_FIFO_FULL (SPI_SR_FTLVL_1 | SPI_SR_FTLVL_0) |
| #define | LL_SPI_DMA_PARITY_EVEN 0x00000000U |
| #define | LL_SPI_DMA_PARITY_ODD 0x00000001U |