STM32G474xx HAL User Manual
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Firmware
Drivers
STM32G4xx_HAL_Driver
Inc
数据结构
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宏定义
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类型定义
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枚举
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函数
stm32g4xx_hal_dma.h 文件参考
DMA HAL模块的头文件。
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#include "stm32g4xx_hal_def.h"
#include "
stm32g4xx_hal_dma_ex.h
"
转到此文件的源代码。
数据结构
struct
DMA_InitTypeDef
DMA配置结构体定义。
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struct
__DMA_HandleTypeDef
DMA句柄结构体定义。
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宏定义
#define
HAL_DMA_ERROR_NONE
0x00000000U
#define
HAL_DMA_ERROR_TE
0x00000001U
#define
HAL_DMA_ERROR_NO_XFER
0x00000004U
#define
HAL_DMA_ERROR_TIMEOUT
0x00000020U
#define
HAL_DMA_ERROR_NOT_SUPPORTED
0x00000100U
#define
HAL_DMA_ERROR_SYNC
0x00000200U
#define
HAL_DMA_ERROR_REQGEN
0x00000400U
#define
DMA_REQUEST_MEM2MEM
0U
#define
DMA_REQUEST_GENERATOR0
1U
#define
DMA_REQUEST_GENERATOR1
2U
#define
DMA_REQUEST_GENERATOR2
3U
#define
DMA_REQUEST_GENERATOR3
4U
#define
DMA_REQUEST_ADC1
5U
#define
DMA_REQUEST_DAC1_CHANNEL1
6U
#define
DMA_REQUEST_DAC1_CHANNEL2
7U
#define
DMA_REQUEST_TIM6_UP
8U
#define
DMA_REQUEST_TIM7_UP
9U
#define
DMA_REQUEST_SPI1_RX
10U
#define
DMA_REQUEST_SPI1_TX
11U
#define
DMA_REQUEST_SPI2_RX
12U
#define
DMA_REQUEST_SPI2_TX
13U
#define
DMA_REQUEST_SPI3_RX
14U
#define
DMA_REQUEST_SPI3_TX
15U
#define
DMA_REQUEST_I2C1_RX
16U
#define
DMA_REQUEST_I2C1_TX
17U
#define
DMA_REQUEST_I2C2_RX
18U
#define
DMA_REQUEST_I2C2_TX
19U
#define
DMA_REQUEST_I2C3_RX
20U
#define
DMA_REQUEST_I2C3_TX
21U
#define
DMA_REQUEST_I2C4_RX
22U
#define
DMA_REQUEST_I2C4_TX
23U
#define
DMA_REQUEST_USART1_RX
24U
#define
DMA_REQUEST_USART1_TX
25U
#define
DMA_REQUEST_USART2_RX
26U
#define
DMA_REQUEST_USART2_TX
27U
#define
DMA_REQUEST_USART3_RX
28U
#define
DMA_REQUEST_USART3_TX
29U
#define
DMA_REQUEST_UART4_RX
30U
#define
DMA_REQUEST_UART4_TX
31U
#define
DMA_REQUEST_UART5_RX
32U
#define
DMA_REQUEST_UART5_TX
33U
#define
DMA_REQUEST_LPUART1_RX
34U
#define
DMA_REQUEST_LPUART1_TX
35U
#define
DMA_REQUEST_ADC2
36U
#define
DMA_REQUEST_ADC3
37U
#define
DMA_REQUEST_ADC4
38U
#define
DMA_REQUEST_ADC5
39U
#define
DMA_REQUEST_QUADSPI
40U
#define
DMA_REQUEST_DAC2_CHANNEL1
41U
#define
DMA_REQUEST_TIM1_CH1
42U
#define
DMA_REQUEST_TIM1_CH2
43U
#define
DMA_REQUEST_TIM1_CH3
44U
#define
DMA_REQUEST_TIM1_CH4
45U
#define
DMA_REQUEST_TIM1_UP
46U
#define
DMA_REQUEST_TIM1_TRIG
47U
#define
DMA_REQUEST_TIM1_COM
48U
#define
DMA_REQUEST_TIM8_CH1
49U
#define
DMA_REQUEST_TIM8_CH2
50U
#define
DMA_REQUEST_TIM8_CH3
51U
#define
DMA_REQUEST_TIM8_CH4
52U
#define
DMA_REQUEST_TIM8_UP
53U
#define
DMA_REQUEST_TIM8_TRIG
54U
#define
DMA_REQUEST_TIM8_COM
55U
#define
DMA_REQUEST_TIM2_CH1
56U
#define
DMA_REQUEST_TIM2_CH2
57U
#define
DMA_REQUEST_TIM2_CH3
58U
#define
DMA_REQUEST_TIM2_CH