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STM32G474xx HAL User Manual
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用于兼容目的的传统定义。 更多...
宏定义 | |
| #define | LL_TIM_DMABURST_BASEADDR_CR1 0x00000000U |
| #define | LL_TIM_DMABURST_BASEADDR_CR2 TIM_DCR_DBA_0 |
| #define | LL_TIM_DMABURST_BASEADDR_SMCR TIM_DCR_DBA_1 |
| #define | LL_TIM_DMABURST_BASEADDR_DIER (TIM_DCR_DBA_1 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2 |
| #define | LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1) |
| #define | LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 |
| #define | LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 | TIM_DCR_DBA_1) |
| #define | LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 | TIM_DCR_DBA_2) |
| #define | LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) |
| #define | LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_CCR4 TIM_DCR_DBA_4 |
| #define | LL_TIM_DMABURST_BASEADDR_BDTR (TIM_DCR_DBA_4 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_CCR5 (TIM_DCR_DBA_4 | TIM_DCR_DBA_1) |
| #define | LL_TIM_DMABURST_BASEADDR_CCR6 (TIM_DCR_DBA_4 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_CCMR3 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2) |
| #define | LL_TIM_DMABURST_BASEADDR_DTR2 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_ECR (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) |
| #define | LL_TIM_DMABURST_BASEADDR_TISEL (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 | TIM_DCR_DBA_3) |
| #define | LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 | TIM_DCR_DBA_3 | TIM_DCR_DBA_0) |
| #define | LL_TIM_DMABURST_BASEADDR_OR (TIM_DCR_DBA_4 | TIM_DCR_DBA_3 | TIM_DCR_DBA_1) |
用于兼容目的的传统定义。
| #define LL_TIM_DMABURST_BASEADDR_AF1 (TIM_DCR_DBA_4 | TIM_DCR_DBA_3) |
TIMx_AF1寄存器是DMA突发的DMA基地址
Definition at line 1397 of file stm32g4xx_ll_tim.h.
| #define LL_TIM_DMABURST_BASEADDR_AF2 (TIM_DCR_DBA_4 | TIM_DCR_DBA_3 | TIM_DCR_DBA_0) |
TIMx_AF2寄存器是DMA突发的DMA基地址
Definition at line 1398 of file stm32g4xx_ll_tim.h.
| #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) |
TIMx_ARR寄存器是DMA突发的DMA基地址
Definition at line 1384 of file stm32g4xx_ll_tim.h.
| #define LL_TIM_DMABURST_BASEADDR_BDTR (TIM_DCR_DBA_4 | TIM_DCR_DBA_0) |
TIMx_BDTR寄存器是DMA突发的DMA基地址
Definition at line 1390 of file stm32g4xx_ll_tim.h.
| #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 |
TIMx_CCER寄存器是DMA突发的DMA基地址
Definition at line 1381 of file stm32g4xx_ll_tim.h.
| #define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1) |
TIMx_CCMR1寄存器是DMA突发的DMA基地址
Definition at line 1379 of file stm32g4xx_ll_tim.h.
| #define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) |
TIMx_CCMR2寄存器是DMA突发的DMA基地址
Definition at line 1380 of file stm32g4xx_ll_tim.h.
| #define LL_TIM_DMABURST_BASEADDR_CCMR3 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2) |
TIMx_CCMR3寄存器是DMA突发的DMA基地址
Definition at line 1393 of file stm32g4xx_ll_tim.h.
| #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) |
TIMx_CCR1寄存器是DMA突发的DMA基地址
Definition at line 1386 of file stm32g4xx_ll_tim.h.
| #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) |
TIMx_CCR2寄存器是DMA突发的DMA基地址
Definition at line 1387 of file stm32g4xx_ll_tim.h.
| #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) |
TIMx_CCR3寄存器是DMA突发的DMA基地址
Definition at line 1388 of file stm32g4xx_ll_tim.h.
| #define LL_TIM_DMABURST_BASEADDR_CCR4 TIM_DCR_DBA_4 |
TIMx_CCR4寄存器是DMA突发的DMA基地址
Definition at line 1389 of file stm32g4xx_ll_tim.h.