RCC Exported Macros

Modules
	AHB1 Peripheral Clock Enable Disable
	Enable or disable the AHB1 peripheral clock.
	AHB2 Peripheral Clock Enable Disable
	Enable or disable the AHB2 peripheral clock.
	AHB3 Peripheral Clock Enable Disable
	Enable or disable the AHB3 peripheral clock.
	APB1 Peripheral Clock Enable Disable
	Enable or disable the APB1 peripheral clock.
	APB2 Peripheral Clock Enable Disable
	Enable or disable the APB2 peripheral clock.
	AHB1 Peripheral Clock Enabled or Disabled Status
	Check whether the AHB1 peripheral clock is enabled or not.
	AHB2 Peripheral Clock Enabled or Disabled Status
	Check whether the AHB2 peripheral clock is enabled or not.
	AHB3 Peripheral Clock Enabled or Disabled Status
	Check whether the AHB3 peripheral clock is enabled or not.
	APB1 Peripheral Clock Enabled or Disabled Status
	Check whether the APB1 peripheral clock is enabled or not.
	APB2 Peripheral Clock Enabled or Disabled Status
	Check whether the APB2 peripheral clock is enabled or not.
	AHB1 Peripheral Force Release Reset
	Force or release AHB1 peripheral reset.
	AHB2 Peripheral Force Release Reset
	Force or release AHB2 peripheral reset.
	AHB3 Peripheral Force Release Reset
	Force or release AHB3 peripheral reset.
	APB1 Peripheral Force Release Reset
	Force or release APB1 peripheral reset.
	APB2 Peripheral Force Release Reset
	Force or release APB2 peripheral reset.
	AHB1 Peripheral Clock Sleep Enable Disable
	Enable or disable the AHB1 peripheral clock during Low Power (Sleep) mode.
	AHB2 Peripheral Clock Sleep Enable Disable
	Enable or disable the AHB2 peripheral clock during Low Power (Sleep) mode.
	AHB3 Peripheral Clock Sleep Enable Disable
	Enable or disable the AHB3 peripheral clock during Low Power (Sleep) mode.
	APB1 Peripheral Clock Sleep Enable Disable
	Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode.
	APB2 Peripheral Clock Sleep Enable Disable
	Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode.
	AHB1 Peripheral Clock Sleep Enabled or Disabled Status
	Check whether the AHB1 peripheral clock during Low Power (Sleep) mode is enabled or not.
	AHB2 Peripheral Clock Sleep Enabled or Disabled Status
	Check whether the AHB2 peripheral clock during Low Power (Sleep) mode is enabled or not.
	AHB3 Peripheral Clock Sleep Enabled or Disabled Status
	Check whether the AHB3 peripheral clock during Low Power (Sleep) mode is enabled or not.
	APB1 Peripheral Clock Sleep Enabled or Disabled Status
	Check whether the APB1 peripheral clock during Low Power (Sleep) mode is enabled or not.
	APB2 Peripheral Clock Sleep Enabled or Disabled Status
	Check whether the APB2 peripheral clock during Low Power (Sleep) mode is enabled or not.
	RCC Backup Domain Reset
	RCC RTC Clock Configuration
	Flags Interrupts Management
	macros to manage the specified RCC Flags and interrupts.
Defines
#define	__HAL_RCC_HSI_ENABLE()   SET_BIT(RCC->CR, RCC_CR_HSION)
	Macros to enable or disable the Internal High Speed 16MHz oscillator (HSI).
#define	__HAL_RCC_HSI_DISABLE()   CLEAR_BIT(RCC->CR, RCC_CR_HSION)
#define	__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(__HSICALIBRATIONVALUE__)   MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, (__HSICALIBRATIONVALUE__) << RCC_ICSCR_HSITRIM_Pos)
	Macro to adjust the Internal High Speed 16MHz oscillator (HSI) calibration value.
#define	__HAL_RCC_HSISTOP_ENABLE()   SET_BIT(RCC->CR, RCC_CR_HSIKERON)
	Macros to enable or disable the force of the Internal High Speed oscillator (HSI) in STOP mode to be quickly available as kernel clock for USARTs and I2Cs.
#define	__HAL_RCC_HSISTOP_DISABLE()   CLEAR_BIT(RCC->CR, RCC_CR_HSIKERON)
#define	__HAL_RCC_LSI_ENABLE()   SET_BIT(RCC->CSR, RCC_CSR_LSION)
	Macros to enable or disable the Internal Low Speed oscillator (LSI).
#define	__HAL_RCC_LSI_DISABLE()   CLEAR_BIT(RCC->CSR, RCC_CSR_LSION)
#define	__HAL_RCC_HSE_CONFIG(__STATE__)
	Macro to configure the External High Speed oscillator (HSE).
#define	__HAL_RCC_LSE_CONFIG(__STATE__)
	Macro to configure the External Low Speed oscillator (LSE).
#define	__HAL_RCC_HSI48_ENABLE()   SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON)
	Macros to enable or disable the Internal High Speed 48MHz oscillator (HSI48).
#define	__HAL_RCC_HSI48_DISABLE()   CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON)
#define	__HAL_RCC_RTC_CONFIG(__RTC_CLKSOURCE__)   MODIFY_REG( RCC->BDCR, RCC_BDCR_RTCSEL, (__RTC_CLKSOURCE__))
	Macros to configure the RTC clock (RTCCLK).
#define	__HAL_RCC_GET_RTC_SOURCE()   (READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL))
	Macro to get the RTC clock source.
#define	__HAL_RCC_PLL_ENABLE()   SET_BIT(RCC->CR, RCC_CR_PLLON)
	Macros to enable or disable the main PLL.
#define	__HAL_RCC_PLL_DISABLE()   CLEAR_BIT(RCC->CR, RCC_CR_PLLON)
#define	__HAL_RCC_PLL_PLLSOURCE_CONFIG(__PLLSOURCE__)   MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__PLLSOURCE__))
	Macro to configure the PLL clock source.
#define	__HAL_RCC_PLL_PLLM_CONFIG(__PLLM__)   MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, ((__PLLM__) - 1) << RCC_PLLCFGR_PLLM_Pos)
	Macro to configure the PLL source division factor M.
#define	__HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__, __PLLR__)
	Macro to configure the main PLL clock source, multiplication and division factors.
#define	__HAL_RCC_GET_PLL_OSCSOURCE()   (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC))
	Macro to get the oscillator used as PLL clock source.
#define	__HAL_RCC_PLLCLKOUT_ENABLE(__PLLCLOCKOUT__)   SET_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))
	Enable or disable each clock output (RCC_PLL_SYSCLK, RCC_PLL_48M1CLK, RCC_PLL_ADCCLK)
#define	__HAL_RCC_PLLCLKOUT_DISABLE(__PLLCLOCKOUT__)   CLEAR_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))
#define	__HAL_RCC_GET_PLLCLKOUT_CONFIG(__PLLCLOCKOUT__)   READ_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))
	Get clock output enable status (RCC_PLL_SYSCLK, RCC_PLL_48M1CLK, RCC_PLL_SAI3CLK)
#define	__HAL_RCC_SYSCLK_CONFIG(__SYSCLKSOURCE__)   MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, (__SYSCLKSOURCE__))
	Macro to configure the system clock source.
#define	__HAL_RCC_GET_SYSCLK_SOURCE()   (READ_BIT(RCC->CFGR, RCC_CFGR_SWS))