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STM32G474xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32g4xx_hal_spi.h 00004 * @author MCD Application Team 00005 * @brief Header file of SPI HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2019 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32G4xx_HAL_SPI_H 00021 #define STM32G4xx_HAL_SPI_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32g4xx_hal_def.h" 00029 00030 /** @addtogroup STM32G4xx_HAL_Driver 00031 * @{ 00032 */ 00033 00034 /** @addtogroup SPI 00035 * @{ 00036 */ 00037 00038 /* Exported types ------------------------------------------------------------*/ 00039 /** @defgroup SPI_Exported_Types SPI Exported Types 00040 * @{ 00041 */ 00042 00043 /** 00044 * @brief SPI Configuration Structure definition 00045 */ 00046 typedef struct 00047 { 00048 uint32_t Mode; /*!< Specifies the SPI operating mode. 00049 This parameter can be a value of @ref SPI_Mode */ 00050 00051 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. 00052 This parameter can be a value of @ref SPI_Direction */ 00053 00054 uint32_t DataSize; /*!< Specifies the SPI data size. 00055 This parameter can be a value of @ref SPI_Data_Size */ 00056 00057 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. 00058 This parameter can be a value of @ref SPI_Clock_Polarity */ 00059 00060 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. 00061 This parameter can be a value of @ref SPI_Clock_Phase */ 00062 00063 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by 00064 hardware (NSS pin) or by software using the SSI bit. 00065 This parameter can be a value of @ref SPI_Slave_Select_management */ 00066 00067 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 00068 used to configure the transmit and receive SCK clock. 00069 This parameter can be a value of @ref SPI_BaudRate_Prescaler 00070 @note The communication clock is derived from the master 00071 clock. The slave clock does not need to be set. */ 00072 00073 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 00074 This parameter can be a value of @ref SPI_MSB_LSB_transmission */ 00075 00076 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. 00077 This parameter can be a value of @ref SPI_TI_mode */ 00078 00079 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. 00080 This parameter can be a value of @ref SPI_CRC_Calculation */ 00081 00082 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. 00083 This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */ 00084 00085 uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation. 00086 CRC Length is only used with Data8 and Data16, not other data size 00087 This parameter can be a value of @ref SPI_CRC_length */ 00088 00089 uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not . 00090 This parameter can be a value of @ref SPI_NSSP_Mode 00091 This mode is activated by the NSSP bit in the SPIx_CR2 register and 00092 it takes effect only if the SPI interface is configured as Motorola SPI 00093 master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0, 00094 CPOL setting is ignored).. */ 00095 } SPI_InitTypeDef; 00096 00097 /** 00098 * @brief HAL SPI State structure definition 00099 */ 00100 typedef enum 00101 { 00102 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ 00103 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 00104 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 00105 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 00106 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 00107 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ 00108 HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ 00109 HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ 00110 } HAL_SPI_StateTypeDef; 00111 00112 /** 00113 * @brief SPI handle Structure definition 00114 */ 00115 typedef struct __SPI_HandleTypeDef 00116 { 00117 SPI_TypeDef *Instance; /*!< SPI registers base address */ 00118 00119 SPI_InitTypeDef Init; /*!< SPI communication parameters */ 00120 00121 const uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ 00122 00123 uint16_t TxXferSize; /*!< SPI Tx Transfer size */ 00124 00125 __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ 00126 00127 uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ 00128 00129 uint16_t RxXferSize; /*!< SPI Rx Transfer size */ 00130 00131 __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ 00132