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STM32G474xx HAL 用户手册
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RCC HAL 扩展模块的头文件。 更多...
#include "stm32g4xx_hal_def.h"数据结构 | |
| struct | RCC_PeriphCLKInitTypeDef |
| RCC 扩展时钟结构体定义。 更多... | |
| struct | RCC_CRSInitTypeDef |
| RCC_CRS 初始化结构体定义。 更多... | |
| struct | RCC_CRSSynchroInfoTypeDef |
| RCC_CRS 同步结构体定义。 更多... | |
宏定义 | |
| #define | RCC_LSCOSOURCE_LSI 0x00000000U |
| #define | RCC_LSCOSOURCE_LSE RCC_BDCR_LSCOSEL |
| #define | RCC_PERIPHCLK_USART1 0x00000001U |
| #define | RCC_PERIPHCLK_USART2 0x00000002U |
| #define | RCC_PERIPHCLK_USART3 0x00000004U |
| #define | RCC_PERIPHCLK_UART4 0x00000008U |
| #define | RCC_PERIPHCLK_UART5 0x00000010U |
| #define | RCC_PERIPHCLK_LPUART1 0x00000020U |
| #define | RCC_PERIPHCLK_I2C1 0x00000040U |
| #define | RCC_PERIPHCLK_I2C2 0x00000080U |
| #define | RCC_PERIPHCLK_I2C3 0x00000100U |
| #define | RCC_PERIPHCLK_LPTIM1 0x00000200U |
| #define | RCC_PERIPHCLK_SAI1 0x00000400U |
| #define | RCC_PERIPHCLK_I2S 0x00000800U |
| #define | RCC_PERIPHCLK_FDCAN 0x00001000U |
| #define | RCC_PERIPHCLK_USB 0x00002000U |
| #define | RCC_PERIPHCLK_RNG 0x00004000U |
| #define | RCC_PERIPHCLK_ADC12 0x00008000U |
| #define | RCC_PERIPHCLK_ADC345 0x00010000U |
| #define | RCC_PERIPHCLK_I2C4 0x00020000U |
| #define | RCC_PERIPHCLK_QSPI 0x00040000U |
| #define | RCC_PERIPHCLK_RTC 0x00080000U |
| #define | RCC_USART1CLKSOURCE_PCLK2 0x00000000U |
| #define | RCC_USART1CLKSOURCE_SYSCLK RCC_CCIPR_USART1SEL_0 |
| #define | RCC_USART1CLKSOURCE_HSI RCC_CCIPR_USART1SEL_1 |
| #define | RCC_USART1CLKSOURCE_LSE (RCC_CCIPR_USART1SEL_0 | RCC_CCIPR_USART1SEL_1) |
| #define | RCC_USART2CLKSOURCE_PCLK1 0x00000000U |
| #define | RCC_USART2CLKSOURCE_SYSCLK RCC_CCIPR_USART2SEL_0 |
| #define | RCC_USART2CLKSOURCE_HSI RCC_CCIPR_USART2SEL_1 |
| #define | RCC_USART2CLKSOURCE_LSE (RCC_CCIPR_USART2SEL_0 | RCC_CCIPR_USART2SEL_1) |
| #define | RCC_USART3CLKSOURCE_PCLK1 0x00000000U |
| #define | RCC_USART3CLKSOURCE_SYSCLK RCC_CCIPR_USART3SEL_0 |
| #define | RCC_USART3CLKSOURCE_HSI RCC_CCIPR_USART3SEL_1 |
| #define | RCC_USART3CLKSOURCE_LSE (RCC_CCIPR_USART3SEL_0 | RCC_CCIPR_USART3SEL_1) |
| #define | RCC_UART4CLKSOURCE_PCLK1 0x00000000U |
| #define | RCC_UART4CLKSOURCE_SYSCLK RCC_CCIPR_UART4SEL_0 |
| #define | RCC_UART4CLKSOURCE_HSI RCC_CCIPR_UART4SEL_1 |
| #define | RCC_UART4CLKSOURCE_LSE (RCC_CCIPR_UART4SEL_0 | RCC_CCIPR_UART4SEL_1) |
| #define | RCC_UART5CLKSOURCE_PCLK1 0x00000000U |
| #define | RCC_UART5CLKSOURCE_SYSCLK RCC_CCIPR_UART5SEL_0 |
| #define | RCC_UART5CLKSOURCE_HSI RCC_CCIPR_UART5SEL_1 |
| #define | RCC_UART5CLKSOURCE_LSE (RCC_CCIPR_UART5SEL_0 | RCC_CCIPR_UART5SEL_1) |
| #define | RCC_LPUART1CLKSOURCE_PCLK1 0x00000000U |
| #define | RCC_LPUART1CLKSOURCE_SYSCLK RCC_CCIPR_LPUART1SEL_0 |
| #define | RCC_LPUART1CLKSOURCE_HSI RCC_CCIPR_LPUART1SEL_1 |
| #define | RCC_LPUART1CLKSOURCE_LSE & |